At process technologies of 0.13 µm and smaller, achieving timing closure for system-on-a-chip (SoC) designs becomes a slippery goal. Ever-tinier interconnects are packed closer together, yielding ...

Signal integrity is a critical design consideration in modern electronic systems, particularly those that depend on high-speed interconnects. As data rates climb and interconnect geometries become ...

The most different aspect between a normal lamination structure and High-Density Fan-out (HDFO) is the routing scale. That aspect is also the challenge and focus of this study. At an HDFO scale, most ...

For those of us who have been evangelizing signal integrity (SI) sign-off, something exciting happened in the first part of 2002. According to the second quarter 2002 EDA Consortium report, the market ...

To achieve gains in power, performance, area, and cost, 3D-IC architectures are pushing electronics design to new limits. Silicon integration technology and associated devices have undergone an ...

Analyzing high speed datacom interfaces is an important task and ensures signal integrity. One major challenge of this analysis is the connection between the physical interface and the oscilloscope, ...

Keysight’s Electrical Performance Scan (EP-Scan) is a digital simulation tool for hardware engineers and PCB designers that performs rapid signal integrity analysis. EP-Scan provides diagnostics to ...