Semiconductor Engineering

Reset Domain Crossing Verification

To meet low-power and high-performance requirements, system on chip (SoC) designs are equipped with several asynchronous and soft reset signals. These reset signals help to safeguard software and ...
Semiconductor Engineering

Streamlining DO-254 Compliance: The Power Of Automated Clock-Domain Crossing Verification

In the realm of safety-critical electronic hardware, particularly those governed by DO-254 compliance directives, ensuring design integrity is paramount. One of the most insidious challenges designers ...
EDN

Real Intent Demonstrates Formal Verification Software for Bug Hunting, Verifying Clock Domain Crossing Signals, Assertions and Timing Constraints at EDSFair2008

Real Intent, Inc., the leading supplier of formal verification software for electronic design, will demonstrate its proven formal verification software at the Electronic Design and Solution Fair 2008 ...
Electronic Design

IC-Design Analyzer Checks Clock-Domain Crossings; Creates Constraints

An increasingly critical area of chip design is that of clock-domain crossings (CDCs), and more than ever CDCs are plaguing FPGA designers. Blue Pearl Software's tools now are friendlier than ever to ...